Grigoris D. Dimitroulakos was born in 1976 in Athens, Greece. He received BSc in Physics from the Department of Physics of University of Patras in 1999. From the Electronics Laboratory of the same department he received MSc in Electronics in 2001. In July 2007, he received PhD degree in the Department of Electrical and Computer Engineering of University of Patras. Since July 2008 he is working at the Informatics and Telecommunications Department at the University of Peloponnese as an academic laboratory instructor.

Research Interests

  • Compilers
  • Programming Languages
  • Object Oriented Design Patterns
  • .NET Technologies
  • Computer Aided Design Tools
  • High Level Synthesis

Publications

Journal Publications

  1. Theodoros Lioris, Grigoris Dimitroulakos, Konstantinos Masselos: An early memory hierarchy evaluation simulator for multimedia applications. Microprocessors and Microsystems - Embedded Hardware Design 38(1): 31-41 (2014)
  2. Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Olivier Sentieys, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, Thomas Perschke: Compiling Scilab to high performance embedded multicore systems. Microprocessors and Microsystems - Embedded Hardware Design 37(8-C): 1033-1049 (2013)
  3. Grigoris Dimitroulakos, Stavros Georgiopoulos, Michalis D. Galanis, Costas E. Goutis: Resource aware mapping on coarse grained reconfigurable arrays. Elsevier, Microprocessors and Microsystems - Embedded Hardware Design 33(2): 91-105 (2009)
  4. Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis: Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays. Springer, The Journal of Supercomputing 48(2): 115-151 (2009)
  5. Michalis D. Galanis, Gregory Dimitroulakos, Costas E. Goutis: Performance and Energy Consumption Improvements in Microprocessor Systems Utilizing a Coprocessor Data-Path. Signal Processing Systems 50(2): 179-200 (2008)
  6. Grigorios Dimitroulakos, N. D. Zervas, N. Sklavos and Costas E. Goutis: Design Techniques and Implementation of Low Power High-Throughput Discrete Wavelet Transform Tilters for JPEG 2000 Standard International Journal of Signal Processing, 4;1, pp. 36-43, www.waset.org Winter 2008
  7. Michalis D. Galanis, Gregory Dimitroulakos, Spyros Tragoudas, Costas E. Goutis: Speedups in embedded systems with a high-performance coprocessor datapath. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007)
  8. Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture. Springer, The Journal of Supercomputing 40(2): 127-157 (2007)
  9. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Speedups and Energy Reductions From Mapping DSP Applications on an Embedded Reconfigurable System. IEEE Trans. VLSI Syst. 15(12): 1362-1366 (2007)
  10. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path. The Journal of Supercomputing 39(3): 251-271 (2007)
  11. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Performance Improvements from Partitioning Applications to FPGA Hardware in Embedded SoCs. Springer, The Journal of Supercomputing 35(2): 185-199 (2006)
  12. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Partitioning Methodology for Heterogeneous Reconfigurable Functional Units. Springer, The Journal of Supercomputing 38(1): 17-34 (2006)
  13. Grigoris Dimitroulakos, Michalis D. Galanis, Athanasios Milidonis, Constantinos E. Goutis: A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000. Elsevier, Integration The VLSI Journal 39(1): 1-11 (2005)
  14. A. Milidonis, G. Dimitroulakos, M. D. Galanis, A. P. Kakarountas and G. Theodoridis, et al: A Framework for Data Partitioning for C++ Data-Intensive Applications, ACM Design Automation for Embedded Systems, Volume 9, Number 2, Pages 101-121 (2004)

Conference Publications

  1. Christakis Lezos, Ioannis Latifis, Grigoris Dimitroulakos, Konstantinos Masselos, “Compiler-Directed Data Locality Optimization in MATLAB” in Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems (SCOPES), Sankt Goar, Germany, May 23-25th, 2016.
  2. Christakis Lezos, Grigoris Dimitroulakos, Ioannis Latifis, Konstantinos Masselos, “Automatic Generation of Code Analysis Tools: The CastQL Approach”, in Proceedings of the 1st International Workshop on Real World Domain Specific Languages (RWDSL), held in conjunction with the 2016 International Symposium on Code Generation and Optimization (CGO), Barcelona, Spain, March 12-18, 2016.
  3. Christakis Lezos, Grigoris Dimitroulakos, Ioannis Latifis, Konstantinos Masselos, “MAFE: An Environment for MATLAB-to-C Compilation Supporting Static and Dynamic Memory Allocation and Multi-Level User Interactive Code Optimization”, in Proceedings of the 2016 International Symposium on Code Generation and Optimization (CGO), Barcelona, Spain, March 12-18, 2016, [Poster session].
  4. Ioannis Latifis, Karthick Parashar, Grigoris Dimitroulakos, Hans Cappelle, Christakis Lezos, Konstantinos Masselos and Francky Catthoor, “Matlab-to-C compilation targeting Application Specific Instruction Set Processors”, in Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), Dresden, Germany, March 14-18, 2016.
  5. Christakis Lezos, Grigoris Dimitroulakos, and Konstantinos Masselos, “Reuse distance analysis for locality optimization in loop-dominated applications”, in Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), Grenoble, France, March 9-13, 2015, pp. 1237-1240.
  6. Christakis Lezos, Grigoris Dimitroulakos, Angeliki Freskou, and Konstantinos Masselos, “Dynamic source code analysis for memory hierarchy optimization in multimedia applications”, in Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing (DASIP), Cagliari, Italy, October 8-10, 2013, pp. 343–344.
  7. Grigoris Dimitroulakos, Christakis Lezos, and Konstantinos Masselos, “MEMSCOPT: A source-to-source compiler for dynamic code analysis and loop transformations”, in Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing (DASIP), Karlsruhe, Germany, October 23-25, 2012, pp. 385-386.
  8. Grigoris Dimitroulakos, Theodoros Lioris, Christakis Lezos, and Konstantinos Masselos, “XMSIM: A tool for early memory hierarchy evaluation”, in Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing (DASIP), Karlsruhe, Germany, October 23-25, 2012, pp. 405-406.
  9. Timo Stripf, Oliver Oey, Thomas Bruckschlögl, Ralf König, Michael Hübner, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Dimitrios Kritharidis, Nikolaos Mitas, George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Steven Derrien, Daniel Menard, Olivier Sentieys, Diana Göhringer, Thomas Perschke: A flexible approach for compiling scilab to reconfigurable multi-core embedded systems. ReCoSoC 2012: 1-8
  10. George Goulas, Panayiotis Alefragis, Nikolaos S. Voros, Christos Valouxis, Christos Gogos, Nikolaos Kavvadias, Grigoris Dimitroulakos, Kostas Masselos, Diana Göhringer, Steven Derrien, Daniel Menard, Olivier Sentieys, Michael Hübner, Timo Stripf, Oliver Oey, Jürgen Becker, Gerard K. Rauwerda, Kim Sunesen, Dimitrios Kritharidis, Nikolaos Mitas: From Scilab to multicore embedded systems: Algorithms and methodologies. ICSAMOS 2012: 268-275
  11. Theodoros Lioris; Grigoris Dimitroulakos and Kostas Masselos: XMSIM: EXtensible Memory SIMulator for Early Memory Hierarchy Evaluation. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2010
  12. Stavros Georgiopoulos, Grigoris Dimitroulakos and Costas Goutis: Integrating High Speed Multipliers in coarse grain reconfigurable arrays. IEEE International Symposium on System-on-Chip SOC 2008. Page(s): 1 – 4
  13. Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis: Compiler assisted architectural exploration for coarse grained reconfigurable arrays. ACM Great Lakes Symposium on VLSI 2007: 164-167
  14. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path. ACM Great Lakes Symposium on VLSI 2007: 2-7 ( Best Paper Award )
  15. Grigoris Dimitroulakos, Michalis D. Galanis, Nikos Kostaras, Costas E. Goutis: A unified evaluation framework for coarse grained reconfigurable array architectures. ACM Conf. Computing Frontiers 2007: 161-172
  16. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path. IEEE International Parallel & Distributed Processing Symposium IPDPS 2007: 1-8
  17. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Performance Optimization of Embedded Applications in a Hybrid Reconfigurable Platform. PATMOS 2007: 352-362
  18. Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis: Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures. IEEE International Parallel & Distributed Processing Symposium IPDPS 2006
  19. Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis: Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic. IEEE International Parallel & Distributed Processing Symposium IPDPS 2006
  20. Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis: Resource constrained modulo scheduling for coarse-grained reconfigurable arrays. IEEE International Symposium on Circuits and Systems, ISCAS 2006
  21. Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis: Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware. IEEE International Parallel & Distributed Processing Symposium 2006
  22. M. D. Galanis, G. Dimitroulakos, C. E. Goutis :" Improving Performance of Embedded Processors with a High-Performance Coarse-Grained Reconfigurable Data-Path ", 13th IEEE Mediterranean Electrotechnical Conference (MELECON 2006), pp. 105-108, 2006.
  23. Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays. IEEE International Conference on Application-specific Systems, Architectures and Processors ASAP 2005: 161-168
  24. M. D. Galanis, G. Dimitroulakos, A. P. Kakarountas, C. E. Goutis: Speedups from Partitioning Software Kernels to FPGA Hardware in Embedded SoCs, IEEE Workshop on Signal Processing Systems, SIPS 2005 (Best Student Paper Award)
  25. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware. IEEE International Conference on Application-specific Systems, Architectures and Processors ASAP 2005: 50-59
  26. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems. IEEE International Symposium on Field-Programmable Custom Computing Machines FCCM 2005: 301-302
  27. Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: Performance Improvements using Coarse-Grain Reconfigurable Logic in Embedded SoCs. International Conference on Field Programmable Logic and Applications 2005: 630-635
  28. Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: A Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained Reconfigurable Architectures. IEEE International Parallel & Distributed Processing Symposium IPDPS Reconfigurable Architectures Workshop (RAW), pp. 160b-160b, 2005
  29. Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis, Athanasios Milidonis: A high-throughput and memory efficient 2D discrete wavelet transform hardware architecture for JPEG2000 standard. IEEE International Symposium on Circuits and Systems, ISCAS 2005: 472-475
  30. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Performance Gains from Partitioning Embedded Applications in Processor-FPGA SoCs. PATMOS 2005: 247-256
  31. Athanasios Milidonis, Grigoris Dimitroulakos, Michalis D. Galanis, George Theodoridis, Constantinos E. Goutis, Francky Catthoor: An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive Applications. SCOPES 2004: 122-136
  32. N. Sklavos, G. Dimitroulakos, O. Koufopavlou, : "An Ultra High Speed Architecture for VLSI Implementation of Hash Functions", proceedings of 10th IEEE International Conference on Electronics, Circuits and Systems (IEEE ICECS'03), pp. 990-993, United Arab Emirates, December 14-17, 2003.
  33. G. Dimitroulakos, A. Milidonis, M. D. Galanis, G. Theodoridis, C. E. Goutis, F.Catthoor, "Power Aware Data Type Refinement on the Hiperlan/2", 10th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2003), vol. 1, pp. 216-219, 2003
  34. G. Dimitroulakos. N.D. Zervas, N. Sklavos, C.E. Goutis, : "An efficient VLSI implementation for forward and inverse wavelet transform for JPEG2000", 14th IEEE International Conference on Digital Signal Processing, (DSP 2002), pp. 233-236, vol.1

Awarded Publications

  1. Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path. ACM Great Lakes Symposium on VLSI 2007: 2-7 ( Best Paper Award )
  2. M. D. Galanis, G. Dimitroulakos, A. P. Kakarountas, C. E. Goutis: Speedups from Partitioning Software Kernels to FPGA Hardware in Embedded SoCs, IEEE Workshop on Signal Processing Systems (SIPS 2005) (Best Student Paper Award)

Book Chapters

  1. Chapter 12 “XMSIM: Extensible Memory Evaluator Simulator for Early Memory Hierarchy Evaluations” Theodoros Lioris, Grigoris Dimitroulakos and Kostas Masselos, in book “VLSI 2010 Annual Symposium Selected Papers”, Nikolaos Voros, Amar Mukherjee, Nicolas Sklavos, Kontsantinos Masselos and Michael Huebner, Lecture Notes in Electrical Engineering, Springer 2011

Contact Info

Email : dhmhgre@uop.gr
Work Tel: +30 2710 372XXX
Work Fax: +30 2710 372160